New considerations of 3-5 MOS and other device considerations

Abstract:  Abstract Attempts to develop GaAs MOS devices on an empirical basis have proven both expensive and unsuccessful. Recently a relatively small expenditure has produced knowledge for GaAs and other 3-5 semiconductors which can let us 1) understand why this has occurred, 2) use more "scientific" engineering to direct future work and 3) make systematic connections between MOS and MESFET technologies. Intrinsic (dangling bond) surface states on the surfaces of most 3-5's are moved out of the band gap by atomic rearrangement at the surface and defect states are produced in the vicinity of the interface. The deep defect levels at the GaAs-oxide interface plus the instability of the GaAs oxide explain the MOS difficulties. The defect level depth also explains the Schottky barrier height on n-GaAs and the success of MESFET's. In contrast, for InP, the proximity of the interface levels to the CBM and oxide stability explain the encouraging MOS results (as well as the failure of MESFET's). Methods of "scientifically" engineering GaAs and InP interfaces to optimize device performance will be discussed.